Thursday, 2019-10-17

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Sundar#startmeeting openstack-cyborg03:01
openstackMeeting started Thu Oct 17 03:01:19 2019 UTC and is due to finish in 60 minutes.  The chair is Sundar. Information about MeetBot at
openstackUseful Commands: #action #agreed #help #info #idea #link #topic #startvote.03:01
*** openstack changes topic to " (Meeting topic: openstack-cyborg)"03:01
openstackThe meeting name has been set to 'openstack_cyborg'03:01
Sundar#topic Who's here03:01
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chenke#info chenke03:01
s_shogo#info s_shogo03:01
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SundarHi chenke, s_shogo, Yumeng03:01
chenkeHi all.03:02
SundarMay be we can wait a couple of minutes for others to join03:02
YumengHi Sundar, hi all03:02
s_shogoHi all03:02
SundarToday's agenda:
SundarPTG etherpad:
Yumengemmm... what's the meaning of "Poject updates: Not at Summit, but in etherpad" ?03:04
YumengIs it canceled ?03:05
openstackgerritXinran WANG proposed openstack/cyborg master: bug fix: ensure resource class instead of getting it.
Sundar#topic PTG, Summit03:07
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SundarYumeng: here's the email I got:03:07
Sundar" Due to various constraints, we are unable to record Project Updates this Summit. ...03:07
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SundarWe suggest that as an alternative, you record your main updates in an etherpad and use that as a resource to share afterwards. ...03:07
xinranwangHi, all. Sorry for being late.03:08
SundarAfter the event, we’ll send out an email requesting slides and an etherpad link for each project. ...03:08
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shaohe_fenghi all03:08
shaohe_fengsorry for late03:08
SundarThose materials will be placed on the Summit Schedule and we will notify the community once they are live. If you would like to record a version of your presentation and send us a link, we can also add that to the Schedule. "03:08
chenkehi xinran ,shaohe.03:08
SundarThat's the message03:08
YumengAlright Thanks! make sense.03:09
SundarPlease add your suggested topics to the PTG etherpad, linked above03:09
SundarAlso, it would be good to have dinner as a team, as we have done before.03:10
SundarDoes Thursday night (Nov 7) work for all of you?03:10
chenkeIt's ok for me.03:11
SundarCool. Let's go with that. If you want to bring anybody else, please go ahead.03:12
SundarI will let you all choose the restaurant! Please make sure it has vegetarian food. :)03:13
Sundar#topic Doc patches03:15
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SundarThanks to Xinran for backporting the doc patches to stable/train03:16
SundarThese were in cyborg master but the release team cut the stable branch after RC103:16
SundarRelease team has said we can backport doc patches any time, and they will take effect wothout version number changes03:17
SundarSo, Yumeng and all, please review it.03:18
xinranwangcan we get bug fix patch in now, as the doc patch ;)03:18
Yumengok, will do.03:19
SundarNope :(  There was lots of resistance to backporting other patches. We can potentially do a point-release early in U if we really want, IMO, all that is beside the point till we get nova integ.03:19
SundarOnce we get nova integ done, we have the option of doing an early point release instead of waiting for April/May03:20
SundarBasically, non-doc patches require version change.03:20
xinranwangok, got it.03:21
xinranwangnow the doc patch review has high priority.03:21
xinranwangwhen is the ddl for doc patches?03:22
SundarNo deadline. Train is more or less done. So, we can backport any time03:23
SundarBTW, Cyborg got some free press in OpenStack press releases:,
SundarKudos to all of you :)03:24
SundarIn other news, Nova-Cyborg interaction spec ( got +2 from Nova PTL. Need to follow up more.03:25
xinranwanggood news!03:26
chenkewill follow up.03:26
SundarThe press articles sound a bit weak because they mentioned only the Nova spec merge. We haven't really claimed that Cyborg supports VM creation etc. in this release. The next release is going to dleiver the goods, and we should be able to make stringer statements.03:27
Sundar#topic AoB03:28
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chenkeCyborg is a popular project for openstack.03:28
SundarAnything else for today?03:29
chenkeI want to confirm that the version has been sent out. Does it make sense to change the documentation?03:29
SundarAre you asking if it is ok to change the docs after Train has shipped?03:30
chenkeIf users take the version, they won't get the latest documents03:30
SundarHmm, if they clone stable/train in the future, after we merge the doc patches, they will get them all.03:30
chenkeHas the train been sent out?03:30
chenkeYes.  If they clone the stable/train , they will get them.03:31
SundarMore or less: has bene merged03:31
SundarI think they have some backend work. It should be done by this week, I think03:31
shaohe_fengWill this release add more ACC support?03:32
SundarDo you mean if we get more drivers in U?03:32
shaohe_fenganother questions.03:32
shaohe_fengmore drivers?03:33
shaohe_fengany plane for it?03:33
shaohe_fengDo we support apply FPGA pf to a VM?03:34
SundarWe could. We need to talk about it. Right now, we got some drivers for GPU and Ascend. However, the maintainers are not regularly participating in Cyborg activities. That makes me concerned about maintenance. Also, we don;t have 3rd party CI for any driver yet. We are planning that for FPGAs, but what about other drivers?03:34
SundarI was replying about drivers, not PF03:35
shaohe_fengso the questions is that.03:35
shaohe_fengIf a end user apply a FPGA03:35
SundarAs a team, we may have to decide on a higher bar for drivers. That is something we can discuss here on at the PTG.03:35
shaohe_fengI will not attend PTG.03:35
SundarAh yes, too bad. You can give your ideas here or in the PTG etherpad.03:36
shaohe_fengif he found there's bug on his bitstream?03:36
shaohe_fengwhat should he do?03:36
shaohe_fengdelete the VM, rebuild a new VM with a FPGA?03:37
SundarPassing a FPGA PF to a VM is potential security hole, because we don;t know what bitstreams get programmed03:37
s_shogoWow, it's so good > CI for FPGA driver's.03:37
shaohe_fengor just re-program it?03:37
SundarWe have a usage model called Runtime Programming, which we don't support today. It involves VM issuing requests for new bitstreams, Cyborg or something receives that request and does the reprogramming. We don;t see many customers asking for that03:38
shaohe_fengmaybe, the end user after doing his AI, then he want to change the AI model, which means he maybe need a new bitstream for his AI net model.03:38
shaohe_fengwhat should he do?03:38
xinranwangI think we can provider a program interface for this kind of users.03:39
xinranwangin vf use case.03:39
SundarHe could get the VM to issue a request somehow to underlying infra. That is not there today. Today, he only needs to stop that VM and start a new one03:39
Sundarxinranwang: User cannot reprogram a FPGA via VF.03:40
shaohe_fengyes, but he take a great effort to setup his AI env, such as install the openvino and the dependency, set connection with the camera maybe.03:40
xinranwangif boot with bit-stream failed, vm should become failed.  if user boot a vm successfully, and want reprogram the FPGA, what will we do.03:41
shaohe_fengso should should delete vm, rebuild one, and take effort to setup the env again?03:41
shaohe_fengSeams now,  the user just can use FPGA as fix function PCI devices once he create the VM03:42
SundarIf there is a strong customer demand for that, have that customer(s) call Intel. This use case will require changes in the product level, software stack and in Cyborg. It will also require discussion among ourselves in Cyborg community.03:43
shaohe_fengI did not seen the flexible advantage of FPGA.03:44
xinranwanghat is a problem.03:44
xinranwang* That03:44
SundarThere are different usage models of FPGA. Many customers are adopting it with the current software stack.03:45
SundarPerhaps we can take this offline, rather than hold everybody up.03:45
shaohe_fengthe question is that, cyborg is not adopt in a product at present. So we miss so many customer demand for end user.03:45
xinranwangIMHO, Cyborg should support reprogram right?03:45
Sundarxinranwang: It should and it does today (at least will after Nova integ).03:45
xinranwangSundar:  Yes, so I think it is doable for user who want update their bitstream.03:46
shaohe_fengso I should tell the user who wants to try cyborg, that we will not  support reprogram, right?03:47
s_shogoIn my case,the current PAC seems to have some constraints (ex necessary for disabling SR-IOV when programming) and that is problem for reprogram in our usecase.03:48
Sundarshaohe_feng: Why do you say that? We can reprogram when a VM is being launched. We cannot reprogram after a VM is launched. Most users today need only the former, from what we have seen.03:48
s_shogoI would like to discuss these constraints are temporary or not, and  cyborg( and user ) should think them as premise or not,in PTG and so on.03:48
Sundars_shogo: Sure, I;ll add usage models as a topic at the PTG, and come with some slides explaining our thoughts/plans.03:49
s_shogoGreat, thanks > Sundar03:49
shaohe_fengSundar, just think you want to do a AI with FPGA. you want to try you different model to find the best solution, what you should do?03:49
shaohe_fengYou can can add the reprogram in the etherpad list.03:50
shaohe_fengand involve more end users to discuss it during PTG.03:50
SundarGeneral question to all: s_shogo, chenke, Yumeng, shaohe_feng, xinranwang: Are you interested in FPGAs with networking? Adding that will require further discussion. We started that at the beginning of Train, but didn't follow u.03:51
SundarIt will require Cyborg-Neutron interaction. I have some ideas for that, but they haven't been discussed deeply with neutron community yet.03:52
xinranwangs_shogo:  Could you list the constraints you met in etherpad?03:52
s_shogoI have great interest in networking with FPGA, as a telco-carrier. ut there is not clear demand for interaction with neutron.03:53
shaohe_fengI have looked into OVS card base FPGA  before.03:54
s_shogoxinranwang: ok, I'll list the constraints in etherpad, it may include misunderstanding, pointing out is welcome and happy for me :)03:54
shaohe_fengit can works with DPDK.03:54
Sundars_shogo: The question is, does the networking solution require basic resources like MAC/IP addresses, and more advanced things like security groups and VXLAN config? These things are best left to neutron, rather than Cyborg replicating them.03:54
xinranwangs_shogo:  thanks, I am willing to see it. We can check if we also met them :P03:55
SundarOK, anything else for today?03:56
YumengSundar: Yes, I have intrests in smart NICs network adapter base FPGA, things like that.03:57
Yumengnothing else. thanks!03:57
SundarGreat. Glad to hear the widespread interest.03:58
s_shogoThe current application in networking in FPGA is limited, so these parameters could be applied via application or operation.03:58
Sundars_shogo and Yumeng: For my interest, are you more interested in OVS offload or in offloading apps like vRAN or vEPC?03:59
s_shogoSundar: Yes, I have interested in them. These performance is critical for telco-carrier.04:00
SundarSO, you are interested in both types?04:01
SundarOCS offload is quite different architecturally from application offload04:01
SundarThe former is from the host, latter from VM.04:02
SundarCyborg has to do different things for both04:02
shaohe_fengWe have a OVS offload card.04:02
shaohe_fengcan do some scenarios on it.04:04
SundarAnyway, we are past the time. We can cover this in next meeting.04:04
SundarThanks, everybody! Have a good day. :)04:04
Sundar#topic endmeeting04:05
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s_shogoThe last message was failed to send...04:55
s_shogoI think there are several patterns in connecting OVS-accelerator (direct virtio, SR-IOV+DPDK, using tc flower,etc), and that effects cyborg and driver's operation.04:58
s_shogoAnyway , I would like to discuss them in next chance:)04:58
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